68000 interface to RAM

I originally posted this on Devega, but I figured I'd repost here to let more eyes go over it.

Take a look at this schematic diagram on Charles MacDonald's site:

http://cgfm2.emuviews.com/img/mega2.gif

It shows the link between the 68000 and its RAM chips. RAM has 14-bit addressing, which means that each chip can store up to $8000 bytes. Data is interlaced between them to allow for a 16-bit wide data bus, and also has the effect of doubling the RAM space to $10000 bytes. What's interesting is correspondance between the 68000's address lines and the RAM chips' address lines. The 68000's A0 (MA0) is pretty much ignored by the entire circuit, which is okay given that it's completely worthless for addressing (it's always forced high). On IC 2, the MA14 is inverted, presumably to allow for proper data interlacing. And most interstingly of all, both RAM chips get MA15.

Why is this a problem? Sega's docs say that RAM is addressed between $00FF0000 and $00FFFFFF, so A15 would always be high, regardless of the RAM address that the programmer wants to use. Even if a program uses a different range, it's likely to consistently use said range for all RAM transfers. This means that, if the 68000's address lines are run directly to the RAM chips, we can only access half of the total avalible RAM. The schematics indicate that the address lines do indeed run directly to RAM.

Obviously, we can access all $10000 bytes of RAM, so something else must be happening. Note the connection with IC 4, the 315-5364. This chip would be able to interpret what the 68000 is trying to access, and route the data appropriately. This is exactly what it does for most transfers, but on the RAM bus, VA1-15 seem to share the same wires as MA1-15. The only way that the 5364 could affect address translation for the RAM chips would be by taking control of the address bus itself, and the 68000 cannot relenquish bus mastership until its current bus cycle is complete.

So, either I'm missing something, or the schematic is wrong. All of the 68000's address lines have to go directly to the 5364 and no place else in order to support the given pin attachment for the RAM chips, but the schematic clearly shows that the runs are shared. I'm at a loss. Guess I'll have to open up a Genesis and trace the runs myself.

EDIT: Okay, so the problem is solved. I messed up the pin correspondance. There's no problem with the schematic.