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Group:
Wiki Sysop: Wiki Sysops
Active Posts:
2066 (1.16 per day)
Most Active In:
General Sega Discussion (445 posts)
Joined:
11-July 08
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Last Active:
User is online 6 minutes ago
Currently:
Viewing Wiki: Sonic Adventure 2: The Trial (Ja...

My Information

Member Title:
「いっきまーす」
Age:
20 years old
Birthday:
August 15, 1992
Gender:
Male Male

Contact Information

E-mail:
Click here to e-mail me
AIM:
AIM  pietro953
Website:
Website  http://

Previous Fields

Project:
Writing my own MD/Genesis sound driver :D
National Flag:
us
Wiki edits:
7,061

Latest Visitors

Topics I've Started

  1. Questions about transistor-level microchip logic

    17 May 2013 - 08:49 AM

    So over the past few days I've been playing around with visual6502 and perfect6502, building this, which I intend to use to hook up several netlisted things together. I have two questions:

    1) This first question involves understanding how visual6502/perfect6502 works. In perfect6502, there are three Boolean properties that a node can have: value (called state in visual6502), pullup, and pulldown. While the value/state holds whether or not the node is actually transmitting a high current, the function to set a node sets the pullup and pulldown properties to the requested state and its inverse, respectively, which are later used to set the value/state for the group of nodes controlled by the node we just set. The segdefs blob used to define nodes specifies the initial pullup property only (that is, pulldown is not set during initialization), and the initial value/state I set to zero. What I didn't understand was what pullup/pulldown represented. According to this, "a '+' [segdefs indicates set pullup on initialization to true] indicates a resistor is connected to the positive supply and will turn on attached gates if not shorted out." So given how setting a node works, should I assume that all node have a pullup resistor that is used to control the value? What about pulldown resistors; would those go on the negative edge? And what is the significance of having both pullup and pulldown set to false on initialization, since setNodes will always ensure pullup == !pulldown?

    2) The second question involves what I am doing with visual6502/perfect6502: right now, data accesses are high-level and done whenever the high-level MMU, called monitor (and stored in runtime_init.go; the file should really be renamed monitor.go and the runtime.go to hlekernal.go) asks for a pin value. Of course this is in violation of 6502 timing diagrams. Furthermore, the monitor is using its own clone of the CPU clock, instead of being driven by the 6502's two-phase clock output. What I want to do is have the CPU, MMU, and other stuff run as separate coroutines. In Go, coroutines communicate with channels, which are mechanisms which send at most one value from a sender to a receiver. Channels block: if there is no sender, a receiver waits for one; if there is no receiver, a sender waits for one. I tried several different approaches that directly hook output/bidirectional pins to channels on node set value in an attempt to improve timing accuracy, but this just caused everything to deadlock. I determined there are several spurious reads and writes on pin nodes, so the question here is: is there a reliable way to determine which pin read/write is one that gets read by an external device? Or do I need to manually reconstruct the timing diagrams? Or am I doing it completely wrong and will need to find a different way to represent pins than channels? Or is timing accuracy not even possible on visual6502/perfect6502 because of how it sets groups of nodes/transistors at once?

    Please let me know if any of this is unclear and I can try to clear it up. Thanks!
  2. IDA in wine stopping because of IDAPython

    01 May 2013 - 10:41 AM

    A while ago IDAPython started to fail to load because it couldn't perform an import site (done by Python initialization). I upgraded my IDAPython from the Python 2.6 version to the Python 2.7 version as Treeki suggested (it works for him/her) to see what was going on, and now it errors with

    Traceback (most recent call last):
      File "C:\Python27\Lib\site.py", line 62, in <module>
        import os
    RuntimeError: unable to get file status from 'C:\Python27\Lib\os.py'
    


    and closes IDA itself, making me unable to use it. The peculiar thing is that if I run the python command line executable from wine (either directly or thorugh wine cmd), everything just works (site imports fine and I can use python). I tried asking both #python and #winehq on Freenode multiple times but to no avail. I also tried looking into the site.py problem myself, noticing that it opens site.py fine and can run the import sys that comes immediately before the import os. Does anyone here know what is going on? Thanks.

    Linux Mint 13 64-bit; wine 1.5.29 from the official wine PPA; IDA Pro Advanced 6.1; IDAPython 1.5.2 for IDA 6.1 for Python 2.7; Python 2.7.4 32-bit
  3. CSS: can I make nested list items justified with outer ones

    28 April 2013 - 06:14 PM

    HTML
    <ul>
        <li>foo
            <ul>
                <li>adsdas</li>
                <li>adsdas</li>
                <li>adsdas</li>
                <li>adsdas
                    <ul>
                        <li>abc</li>
                    </ul>
                </li>
                <li>asdasd</li>
            </ul>    
        </li>
    </ul>
    
    CSS
    ul ul {
        list-style-position: inside;
        padding-left: 0px;
    }
    
    Or try a playground: http://jsfiddle.net/PGVnB/1/

    I'd like the inner ul to also have its bullet justified with the leftmost margin of the text of the outer bullet, but no matter what I do (ul ul ul, ul ul li ul, ul li ul ul, ul li ul li ul, ul > ul, putting ul ul ul as a separate block, putting that separate block first, removing padding-left from that separate block), the third-level bullet refuses to align itself with the text of the second-level bullet, instead aligning to the bullet itself. That is to say, I want it to look like this:
    - level 1
      - level 2
      - level 2
        - level 3
      - level 2
    


    I have a feeling list-style-position: inside is screwing up the browser's idea of where the left margin of the second level bullet is... Is there a solution to this problem that does not involve manually setting padding values and just using those (which is what Sik suggested)? Thanks.
  4. My computer has been getting incrementally slower

    15 March 2013 - 05:56 PM

    The most I can remember is that for the past few months I thought it was just that I couldn't run MAME for too long a period of time before it started to slow everything down horribly but over the past couple of weeks every other thing on my system has started to show the same problem: I can run any emulator, or IDA in wine, or YouTube videos, and within a very short period of time my computer would start slowing down horribly and I would need to stop doing any of that for some time before I could continue. More and more programs became inflicted by this over time and I have no idea what is going on. In fact, for the longest time, I thought Gens/GS was immune, but now that's no longer the case.

    Dell Precision M6400 from 2009 running Linux Mint 13 64-bit
    Intel Core 2 Duo T9800, 2.93GHz
    4GB RAM
    graphics card: nVidia Quadro FX 2700M; I used both Nouveau and the official nVidia driver and noticed no difference

    Can someone help me figure out what the hell is going on? Thanks.
  5. What's the custom ISO9660 format used by Dreamcast games...

    06 February 2013 - 06:23 PM

    I tried a variety of Google searches but the closest I got was this blog post by the author of gcfuse/xbfuse which merely confirmed that the Dreamcast game data track (track 3) uses a custom ISO9660. I can't get any files out of this data track on Linux with standard ISO9660 tools (trying with simple ISO extraction in both p7zip and The Unarchiver, mount, and cdemu). What is this format, so a proper mounter can be written? Thanks.