The current specifications are available at
Components implemented in the specification thus far:
- VDP registers (24 user-visible registers; does NOT include address counter and other internal registers.)
- Z80 memory
- Z80 registers
- YM2612 (registers only; timers need to be added)
- M68K memory
- M68K registers
- I/O ports ($A10000-$A1001F range)
- Z80 control logic (BUSREQ, RESET, banking)
I'd like some comments on the current draft. In particular, MD/Z80_ctrl.bin currently uses "1" to indicate the Z80 is in RESET, whereas the actual value used for resetting the Z80 is "0". (Gens itself, and the Genecyst savestate format, use "1" to indicate RESET.) I'm not sure if I should change it to match the actual system or keep it so it matches Gens internally and also the old savestate format.
EDIT: I switched BUSREQ and RESET to use the values used on the actual MD instead of the Genecyst values. (BUSREQ: 0 == Z80 has bus, 1 == M68K has bus; RESET: 0 == Z80 is RESET, 1 == Z80 is running.) This is opposite of what Gens/GS II uses internally, so I'll probably change Gens/GS II's internal representation later.